Есть микросхема HCS410 производимая компанией Microchip, всего у неё 8 ножек, обозначены они следующим образом: S0, S1, S2/LED, LC1, GND, PWM, LC0, VDD
Она реализует алгоритм шифрования keeloq и функцию авторизации IFF.
Вот некоторые выдержки из даташита касательно распиновки и функциональных назначений:
FEATURES
Security
• Two programmable 64-bit encoder keys
• 16/32-bit bi-directional challenge and response using one of two keys
• 69-bit transmission length
• 32-bit unidirectional code hopping, 37-bit non-encrypted portion
• Encoder keys are read protected
• Programmable 28/32-bit serial number
• 60/64-bit, read-protected seed for secure learning
• Three IFF encryption algorithms
• Delayed increment mechanism
• Asynchronous transponder communication
• Queuing information transmitted
Operating
• 2.0V - 6.6V operation, 13V encoder only operation
• Three switch inputs [S2, S1, S0]—seven functions
• Batteryless bi-directional transponder
• Selectable baud rate and code word blanking
• Automatic code word completion
• Battery low signal transmitted
• Non-volatile synchronization
• PWM or Manchester RF encoding
• Combined transmitter, transponder operation
• Anti-collision of multiple transponders
• Passive proximity activation
• Device protected against reverse battery
• Intelligent damping for high Q LC-circuits
Other
• 37-bit nonencrypted part contains 28/32-bit serial
number, 4/0-bit function code, 1-bit battery low,
2-bit CRC, 2-bit queue
• Simple programming interface
• On-chip tunable RC oscillator (±10%)
• On-chip EEPROM
• 64-bit user EEPROM in transponder mode
• Battery-low LED indication
• SQTP serialization quick-time programming
• 8-pin PDIP/SOIC/TSSOP and die
Typical Applications
• Automotive remote entry systems
• Automotive alarm systems
• Automotive immobilizers
• Gate and garage openers
• Electronic door locks (Home/Office/Hotel)
• Burglar alarm systems
• Proximity access control
2.1 Pinout Description
The HCS410 has the same footprint as all of the other devices in the KEELOQ family, except for the two pins that are reserved for transponder operations and the LED that is now located at the same position as the S2 switch input.
S[0:1] – are inputs with Schmitt Trigger detectors and an internal 60k¾ (nominal) pull-down resistors.
S2/LED – uses the same input detection circuit as S0/S1 but with an added PMOS transistor connected to VDD capable of sourcing enough current to drive an LED.
LC[0:1] – is the transponder interface pins to be connected to an LC circuit for inductive communication. LC0 is connected to a detector for data input. Data output is achieved by clamping LC0 and LC1 to GND through two NMOS transistors. These pins are also connected to a rectifier and a regulator, providing power to the rest of the logic and for charging an external power source (Battery/Capacitor) through VDD.
The input impedance of the LC pins is a function of input voltage. At low voltages, the input impedance is in the order of mega-ohms. When laying out a PC board, care should be taken to ensure that there is no cross coupling between the LC pins and other traces on the board. Glitches on the LC lines will cause the device to reset. A high-value resistor (220 KW) between LC0 and GND can be added to reduce sensitivity.
TABLE 2-1: PINOUT DESCRIPTION
НАЧАЛО ТАБЛИЦЫ
| Pin Number | Name | Description |
| ---------- | ----------- | --------------------------------------------------------------------- |
| 1 | S0 | Switch input 0 |
| 2 | S1 | Switch input 1 |
| 3 | S2/LED | Switch input 2/LED output, Clock pin for programming mode |
| 4 | LC1 | Transponder interface pin |
| 5 | VSS | Ground reference connection |
| 6 | PWM | Pulse width modulation (PWM) output pin/Data pin for programming mode |
| 7 | LC0 | Transponder interface pin |
| 8 | VDD | Positive supply voltage connection |
КОНЕЦ ТАБЛИЦЫ
TABLE 2-2: FUNCTION CODES
НАЧАЛО ТАБЛИЦЫ
| | LC0 | S2 | S1 | S0 | Comments |
| - | --- | -- | -- | -- | ----------------------------------------------------------------------------------------- |
| 1 | 0 | 0 | 0 | 1 | Normal Code Hopping transmission |
| 2 | 0 | 0 | 1 | 0 | Normal Code Hopping transmission |
| 3 | 0 | 0 | 1 | 1 | Delayed seed transmission if allowed by SEED and TMPSD/Normal Code Hopping transmission |
| 4 | 0 | 1 | 0 | 0 | Normal Code Hopping transmission |
| 5 | 0 | 1 | 0 | 1 | Normal Code Hopping transmission
| 6 | 0 | 1 | 1 | 0 | Normal Code Hopping transmission
| 7 | 0 | 1 | 1 | 1 | Immediate seed transmission if allowed by SEED and TMPSD/Normal Code Hopping transmission
| 8 | 1 | 0 | 0 | 0 | Transponder mode
КОНЕЦ ТАБЛИЦЫ
2.4 IFF Mode
IFF mode allows the decoder to perform an IFF validation, to write to the user EEPROM and to read from the user EEPROM. Each operation consists of the decoder sending an opcode data and the HCS410 giving a response. There are two IFF modes: IFF1 and IFF2. IFF1 allows only one key IFF, while IFF2 allows two keys to be used.
Note: When IFF2 is enabled, seed transmissions will not be allowed.
It is possible to use the HCS410 as an IFF token without using a magnetic field for coupling. The HCS410 can be directly connected to the data line of the decoder as shown in Figure 2-3. The HCS410 gets its power from the data line as it would in normal transponder mode. The communication is identical to the communication used in transponder mode.
2.4.1 IFF MODE ACTIVATION
The HCS410 will enter IFF mode if the capacitor/inductor resonant circuit generates a voltage greater than approximately 1.0 volts on LC0. After the verified application of power and elapse of the normal reset period, the device will start responding by pulsing the DATA line (LC0/1) with pulses as shown in Figure 2-17. This action will continue until the pulse train is terminated by receiving a start signal of duration 2TE, on the LC inputs before the next expected marker pulse. The device now enters the IFF mode and expects to receive an ‘Opcode’ and a 0/16/32-bit Data-stream to react on. The data rate (TE) is determined by the TBSL bits in the configuration word. See Section 3.0 for additional details.
2.4.2 IFF DECODER COMMANDS
As shown in Figure 2-15, a logic 1 and 0 are differentiated by the time between two rising edges. A long pulse indicates a 1; a short pulse, a 0.
FIGURE 2-15: MODULATION FOR IFF COMMUNICATION
НАЧАЛО СХЕМЫ
PPM Decoder Commands
Start or previous bit
. . . . : |------------------------- |-------- . . . .
0 : | | |
: | | |
: | | |
. . . . .| |--------|
| | 3 TE | TE |
| | | |
. . . . : |------------------------------------------ |-------- . . . .
1 : | | |
: | | |
: | | |
. . . . .| |--------|
| | 5 TE | TE |
| | | |
PPM Encoder Response
. . . . : |--------| |------------------------. . . .
0 : | | |
: | | |
: | | |
. . . . .| |--------|
| | TE | TE |
| | | |
. . . . : |----------------| |----------------. . . .
1 : | | |
: | | |
: | | |
. . . . .| |--------|
| | 2 TE | TE |
| | | |
КОНЕЦ СХЕМЫ
FIGURE 2-16: OVERVIEW OF IFF OPERATION
НАЧАЛО СХЕМЫ
IFF
. . . .------------------------------------------------------------------------------------. . . .-------------
| Activate | Opcode | 32/16-bit Challenge | | 32/16-bit Response | | Opcode |
------------------------------------------ ---------------------- ----------
WRITE
. . . .------------------------------------------------------------------------. . . . . . . . .---------------
| Activate | Opcode | 16-bit Data | | OK | : | Opcode |
----------------------------------- ------. . . . ----------
READ
. . . .--------------------- --------------- . . . . . . . . . . . . . . . . . . . .---------------
| Activate | Opcode | | 16-bit Data | | Opcode |
------------------------------------------------- ----------
КОНЕЦ СХЕМЫ
TABLE 2-3: IFF TIMING PARAMETERS
НАЧАЛО ТАБЛИЦЫ
| Parameter | Symbol | Minimum | Typical | Maximum | Units |
| ---------------------------------------------------- | ------------ | ------------- | ------------- | --------- | --------- |
| Time Element IFFB = 0 IFFB = 1 | TE | - - | 200 100 | - - | uS |
| PPM Command Bit Time Data = 1 Data = 0 | TBITC | 3.5 5.5 | 4 6 | - - | TE |
| PPM Response Bit Time Data = 1 Data = 0 | TBITR | - - | 2 3 | - - | TE |
| PPM Command Minimum High Time | TPMH | 1.5 | - | - | TE |
| Response Time (Minimum for Read) | TRT | 6.5 | - | - | ms |
| Opcode to Data Input Time | TOTD | 1.8 | - | - | ms |
| Transport Code to Data Input Time | TTTD | 6.8 | - | - | ms |
| IFF EEPROM Write Time (16 bits) | TWR | - | - | 30 | ms |
КОНЕЦ ТАБЛИЦЫ
2.4.3 HCS410 RESPONSES
The responses from the HCS410 are in PPM format. See Figure 2-17 for additional information. Every response from the HCS410 is preceded by a “2 bit preamble” of 012, and then 16/32 bits of data.
2.4.4 IFF RESPONSE
The 16/32-bit response to a 16/32-bit challenge, is transmitted once, after which the device is ready to accept another command. The same applies to the result of a Read command. The opcode written to the device specifies the challenge length and algorithm used. The response always starts with a leading preamble of 012 followed by the 16/32 bits of data.
2.4.5 IFF WRITE
The decoder can write to USER[0:3], SER[0:1], and the configuration word in the EEPROM. After the HCS410 has written the word into the EEPROM, it will give two acknowledge pulses (TE wide and TE apart) on the LC pins. When writing to the serial number or configuration word, the user must send the transport code before the write will begin (Section 3.4).
If the configuration word is written, the device must be reset to allow the new configuration settings to come into effect.
2.4.6 IFF READ
The decoder can read USER[0:3], SER[0:1], and the configuration word in the EEPROM. After the data has been read, the device is ready to receive a command again.
Each read command is followed by a 16-bit data response. The response always starts with a leading preamble of 012 and then the 16-bits of data.
2.5 IFF Opcodes
TABLE 2-4: LIST OF IFF COMMANDS
НАЧАЛО ТАБЛИЦЫ
| Command | Description | Expected data In | Response |
| ------- | ----------------------------------------------- | --------------------------------------------------------------------------- | ------------------------------------------------------------------------------------------------- |
| 00000 | Select HCS410, used if Anticollision enabled | 1 to 32 bits of the serial number (SER) | Encoder select acknowledge if SER match |
| 00001 | Read configuration word | None | 16-bit configuration word |
| 00010 | Read low serial number | None | Lower 16 bits of serial number (SER0) |
| 00011 | Read high serial number | None | Higher 16 bits of serial number (SER1) |
| 00100 | Read user area 0 | None | 16 Bits of User EEPROM USR0 |
| 00101 | Read user area 1 | None | 16 Bits of User EEPROM USR1 |
| 00110 | Read user area 2 | None | 16 Bits of User EEPROM USR2 |
| 00111 | Read user area 3 | None | 16 Bits of User EEPROM USR3 |
| 01000 | Program HCS410 EEPROM | Transport code (32 bits); Complete memory map: 18 x 16 bit words (288 bits) | Write acknowledge pulse after each 16-bit word, 288 bits transmitted in 18 bursts of 16-bit words |
| 01001 | Write configuration word | Transport code (32 bits); 16 Bit configuration word | Write acknowledge pulse |
| 01010 | Write low serial number | Transport code (32 bits); Lower 16 bits of serial number (SER0) | Write acknowledge pulse |
| 01011 | Write high serial number | Transport code (32 bits); Higher 16 bits of serial number (SER1) | Write acknowledge pulse |
| 01100 | Write user area 0 | 16 Bits of User EEPROM USR0 | Write acknowledge pulse |
| 01101 | Write user area 1 | 16 Bits of User EEPROM USR1 | Write acknowledge pulse |
| 01110 | Write user area 2 | 16 Bits of User EEPROM USR2 | Write acknowledge pulse |
| 01111 | Write user area 3 | 16 Bits of User EEPROM USR3 | Write acknowledge pulse |
| 1X000 | IFF1 using key-1 and IFF algorithm | 32-Bit Challenge | 32-Bit Response |
| 1X001 | IFF1 using key-1 and HOP algorithm | 32-Bit Challenge | 32-Bit Response |
| 1X100 | IFF2 using key-2 and IFF algorithm | 32-Bit Challenge | 32-Bit Response |
| 1X101 | IFF2 using key-2 and HOP algorithm | 32-Bit Challenge | 32-Bit Response |
КОНЕЦ ТАБЛИЦЫ
2.6 IFF Special Features
2.6.1 ANTI-COLLISION (ACOLI)
When the ACOLI bit is set in the configuration word, anti-collision mode is entered. The HCS410 will start sending ACK pulses when it enters a magnetic field. The ACK pulses stop as soon as the HCS410 detects a start bit from the decoder. A ‘select encoder’ opcode (00000) is then sent out by the decoder, followed by a 32-bit serial number. If the serial number matches the HCS410’s serial number, the HCS410 will acknowledge with the acknowledge sequence as shown in Figure 2-18. The HCS410 can then be addressed as normal. If the serial number does not match, the IFF encoder will stop transmitting ACK pulses until it is either removed from the field or the correct serial number is given.
FIGURE 2-18: SERIAL NUMBER CORRECT ACKNOWLEDGE SEQUENCE
НАЧАЛО СХЕМЫ
|TE |
LC0/1 | |
---| |---| |---| |---| |-----------| |---| |-----------| |---| |---
| | | | | | | | | | | | | | | |
|---| |---| |---| |---| |---| |---| |---| |---|
| | | 3 TE | | 3 TE |
|TE |
КОНЕЦ СХЕМЫ
3.0 EEPROM ORGANIZATION AND CONFIGURATION
The HCS410 has nonvolatile EEPROM memory which is used to store user programmable options. This information includes encoder keys, serial number, and up to 64-bits of user information.
The HCS410 has two modes in which it operates as specified by the configuration word. In the first mode the HCS410 has a single encoder key which is used for encrypting the code hopping portion of a CH Mode transmission and generating a response during IFF validation. Seed transmissions are allowed in this mode. In the second mode the HCS410 is a transponder device with two encoder keys.
The two different operating modes of the HCS410 lead to different EEPROM memory maps.
In IFF1 mode, the HCS410 can act as a code hopping encoder with Seed transmission, and as an IFF token with one key.
НАЧАЛО ТАБЛИЦЫ
| IFF1 Mode |
| ------------------------------------------------------- |
| 64-bit Encoder Key 1 |
| 64-bit Seed/Transport Code (SEED0, SEED1, SEED2, SEED3) |
| 32-bit Serial Number (SER0, SER1) |
| 64-bit User Area (USR0, USR1, USER2, USR3) |
| 10-bit Discrimination Value and 2 Overflow Bits. |
| 16-bit Synchronization Counter |
| Configuration Data |
КОНЕЦ ТАБЛИЦЫ
In IFF2 mode, the HCS410 is able to act as a code hop-
ping transmitter and an IFF token with two encoder
keys.
НАЧАЛО ТАБЛИЦЫ
| IFF2 Mode |
| ------------------------------------------------------- |
| 64-bit Encoder Key 1 |
| 64-bit Encoder Key 2/Transport Code |
| 32-bit Serial Number (SER0, SER1) |
| 64-bit User Area (USR0, USR1, USER2, USR3) |
| 10-bit Discrimination Value and 2 Overflow Bits. |
| 16-bit Synchronization Counter |
| Configuration Data |
КОНЕЦ ТАБЛИЦЫ
3.1 Encoder Key 1 and 2
The 64-bit encoder key1 is used by the transmitter to create the encrypted message transmitted to the receiver in Code Hopping Mode. An IFF operation, can use encoder key1 or key2 to generate the response to a challenge received. The key(s) is created and programmed at the time of production using a key generation algorithm. Inputs to the key generation algorithm are the serial number or seed for the particular transmitter being used and a secret manufacturer’s code. While a number of key generation algorithms are supplied by Microchip, a user may elect to create their own method of key generation. This may be done providing that the decoder is programmed with the same means of creating the key for decryption purposes. If a seed is used (CH Mode), the seed will also form part of the input to the key generation algorithm.
3.2 Discrimination Value and Overflow
The discrimination value forms part of the code hopping portion of a code hopping transmission. The least significant 10 bits of the discrimination value are typically set to the least significant bits of the serial number. The most significant 2 bits of the discrimination value are the overflow bits (OVR1: OVR0). These are used to extend the range of the synchronization counter. When the synchronization counter wraps from FFFF16 to 000016 OVR0 is cleared and the second time a wrap occurs OVR1 is cleared.
Once cleared, the overflow bits cannot be set again, thereby creating a permanent record of the counter overflow.
3.3 16-bit Synchronization Counter
This is the 16-bit synchronization counter value that is used to create the code hopping portion for transmission. This value will be changed after every transmission. The synchronization counter is not used in IFF mode.
3.4 60/64-bit Seed Word/Transport Code
This is the 60-bit seed code that is transmitted when seed transmission is selected. This allows the system designer to implement the secure learn feature or use this fixed code word as part of a different key generation/tracking process or purely as a fixed code transmission. The seed is not available in IFF2-mode. A Seed transmission can be initiated in two ways, depending on the button inputs (Figure 3-1).
Seed transmission is available for function codes (Table 2-2) S[2:0] = 111 and S[2:0] = 011 (delayed). The delayed seed transmission starts with a normal code hopping transmission being transmitted for 3 seconds, before switching to a seed transmission. The two seed transmissions are shown in Figure 3-1.
The least significant 32-bits of the seed are used as the transport code. The transport code is used to write-protect the serial number, configuration word, as well as preventing accidental programming of the HCS410 when in IFF mode.
Note: If both SEED and TMPSD are set, IFF2 mode is enabled.
3.5 Encoder Serial Number
There are 32 bits allocated for the serial number and a selectable configuration bit (XSER) determines whether 32 or 28 bits will be transmitted. The serial number is meant to be unique for every transmitter.
3.6 User Data
The 64-bit user EEPROM can be reprogrammed and read at any time using the IFF interface.
3.7 Configuration Data
The configuration data is used to select various encoder options. Further explanations of each of the bits are described in the following sections.
TABLE 3-1: CONFIGURATION OPTIONS SEED
НАЧАЛО ТАБЛИЦЫ
| Symbol | Description |
| ---------- | ----------------------------------------|
| CWBE | Code Word Blanking Enable |
| IDAMP | Intelligent Damping for High Q LC Tank. |
| SEED/IFF2 | Enable Seed Transmissions |
| TMPSD/IFF2 | Temporary Seed Transmissions |
| OSC0:3 | Onboard Oscillator Tuning Bits |
| MTX3 | Minimum 3 Code Words Transmitted |
| VLOW | Low Voltage Trip Point Selection |
| LED | Enable LED output |
| BSL0:1 | Baudrate Select |
| TBSL | Transponder Baud Rate |
| MANCH | Manchester Modulation Mode |
| ACOLI | Anti Collision Communication Enable |
| XPRF | Passive Proximity Activation |
| DINC | Delayed Increment Enable |
| XSER | Extended Serial Number |
КОНЕЦ ТАБЛИЦЫ
Достаточно ли этой информации чтобы ты смог подключить HCS410 к ардуино и написать код для выполнения запроса IFF1 ?